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In this section we derive implementations of some of the add and multiply algorithms discussed before that serially reuse components for the sake of efficiency and provide cost-effective register arrangements to store the intermediate results and select them for later operations.

If $\mathrm{h}$ is the depth of the add or the multiply circuit, its processing time is $\mathrm{h}^* \mathrm{~T}$. As pointed out in section 1.5, if the multiplier is used at its maximum rate corresponding to its processing time, then the adder circuits performing the computation are used with an efficiency of $1 / \mathrm{h}$ only. Pipelining can also be used to raise the efficiency. The layered structure of the multiplier in Figure 4.1(c) can be used to pipeline its operation by inserting registers between the layers both for the intermediate results and for the operands. Then the multiplication still takes the same time (even a little more due to the registers) but subsequent multiplications can be started at the rate given by $\mathrm{T}$ that is independent of $\mathrm{h}$, and the efficiency becomes close to $100 \%$ (with a proportional increase of the power consumption). The storage and power requirements become lower if the layers are grouped into sets of $\mathrm{h}^{\prime}$ layers and the pipelining is implemented for these only. Then the pipelined multiplications can be started at a rate of $\mathrm{h}^{\prime *} \mathrm{~T}$ and the efficiency raises to close to $1 / \mathrm{h}^{\prime}$.

The n-bit binary ripple-carry adder applies $n$ identical full adder circuits at all bit positions. The full adders are connected in series via the carries. The full adder operations can be executed serially on a single full adder circuit, starting with bit 0 , by using as the full adder inputs for the $\mathrm{i}^{\text {th }}$ or $\mathrm{i}$-th application the bits $\mathrm{a}{\mathrm{i}}, \mathrm{b}{\mathrm{i}}$ from the operands and the carry signal $\mathrm{c}{\mathrm{i}}$ that has been computed as the overflow $\mathrm{O}{\mathrm{i}-1}$ in the previous application. $\mathrm{o}_{\mathrm{i}-1}$ must be stored in a flip-flop in order to be able to use it in the subsequent step, but it is no longer used thereafter and the same flip-flop can be used to store all the carries in sequence (Figure 4.3). It must be cleared to zero at the start of the serial computation. This also eliminates the need to select the carry input from different sources during the sequence of steps.

## CS代写|数字硬件系统代写Digital Hardware System代考|DISTRIBUTED ARITHMETIC

Sums of products
$$g=\sum_{\mathrm{k}=0}^{\mathrm{r}-1} \mathrm{~A}{\mathrm{k}} \mathrm{x}{\mathrm{k}}$$
with constant coefficients $A_{\mathrm{k}}$, i.e. considered as functions of the $\mathrm{x}{\mathrm{k}}$ only, can be evaluated for small $n$ quite efficiently using look-up tables, yet not using the entire multi-bit binary or fixed point codes of the $\mathrm{x}{\mathrm{k}}$ to address the table, but individual bit $\mathrm{x}{\mathrm{k}, \mathrm{i}}$ for the same arbitrary bit position $i$. Then fairly small look-up tables addressed by $r$ bits suffice. For $\mathrm{n}=3 . .6$ such are offered by the cells of current FPGA chips. Therefore this approach yields an efficient implementation for multiple multiply-and-add operations on such chips. For all k, $$x_k=\sum{i=0}^{n-1} x_{k, i} 2^i$$
hence
$$g=\sum_{i=0}^{n-1} s_i 2^i$$
with
$$\mathrm{s}{\mathrm{i}}=\sum{\mathrm{k}=0}^{\mathrm{r}-1} \mathrm{x}{\mathrm{k}, \mathrm{i}}{ }^* \mathrm{~A}{\mathrm{k}}=\mathrm{F}\left(\mathrm{x}{0, \mathrm{i}}, \ldots, \mathrm{x}{\mathrm{r}-1, \mathrm{i}}\right)$$

$\mathrm{F}$ is the function of $\mathrm{r}$ Boolean inputs defined by $\mathrm{F}\left(\mathrm{b}0, \ldots, \mathrm{b}{\mathrm{r}-1}\right)=\sum_{\mathrm{k}} \mathrm{b}{\mathrm{k}} * \mathrm{~A}{\mathrm{k}}$. It outputs n’-bit words with $\mathrm{n}^{\prime}>\mathrm{n}$ due to the multiple add function and is realized using a table. Then, $\mathrm{g}$

is summed up serially using the Horner scheme using the sequential structure in Figure 4.7 which is similar to Figure 4.5 :
\begin{aligned} \mathrm{g}= & 2^{\mathrm{n}}\left(\left(. .\left(\left(\mathrm{F}\left(\mathrm{x}{0,0}, \ldots, \mathrm{x}{\mathrm{r}-1,0}\right)^* 2^{-1}+\mathrm{F}\left(\mathrm{x}{0,1}, \ldots, \mathrm{x}{\mathrm{r}-1,1}\right)^* 2^{-1}+\ldots\right)^* 2^{-1}\right.\right.\right. \ & \left.+\mathrm{F}\left(\mathrm{x}{0, \mathrm{n}-1}, \ldots, \mathrm{x}{\mathrm{r}-1, \mathrm{n}-1}\right)\right) \end{aligned}
The operand bit $\mathrm{x}_{\mathrm{k}, \mathrm{i}}$ need to be input serially using e.g. shift registers clocked synchronously with the add and shift steps.

## 数字硬件系统代写

n位二进制纹波进位加法器在所有位位置应用$n$相同的全加法器电路。全加法器通过进位串联起来。完整加法器操作可以在单个完整加法器电路上串行地执行，从位0开始，通过使用来自操作数的位$\mathrm{a}{\mathrm{i}}, \mathrm{b}{\mathrm{i}}$和在前一个应用程序中计算为溢出$\mathrm{O}{\mathrm{i}-1}$的进位信号$\mathrm{c}{\mathrm{i}}$作为$\mathrm{i}^{\text {th }}$或$\mathrm{i}$应用程序的完整加法器输入。$\mathrm{o}_{\mathrm{i}-1}$必须存储在一个触发器中，以便能够在后续步骤中使用它，但此后不再使用它，并且可以使用同一个触发器按顺序存储所有进位(图4.3)。它必须在串行计算开始时清除为零。这也消除了在步骤序列中从不同源选择进位输入的需要。

## CS代写|数字硬件系统代写Digital Hardware System代考|DISTRIBUTED ARITHMETIC

$$g=\sum_{\mathrm{k}=0}^{\mathrm{r}-1} \mathrm{~A}{\mathrm{k}} \mathrm{x}{\mathrm{k}}$$

$$g=\sum_{i=0}^{n-1} s_i 2^i$$

$$\mathrm{s}{\mathrm{i}}=\sum{\mathrm{k}=0}^{\mathrm{r}-1} \mathrm{x}{\mathrm{k}, \mathrm{i}}{ }^* \mathrm{~A}{\mathrm{k}}=\mathrm{F}\left(\mathrm{x}{0, \mathrm{i}}, \ldots, \mathrm{x}{\mathrm{r}-1, \mathrm{i}}\right)$$

$\mathrm{F}$ 是$\mathrm{F}\left(\mathrm{b}0, \ldots, \mathrm{b}{\mathrm{r}-1}\right)=\sum_{\mathrm{k}} \mathrm{b}{\mathrm{k}} * \mathrm{~A}{\mathrm{k}}$定义的$\mathrm{r}$布尔输入的函数。由于多重添加功能，它输出n’位单词$\mathrm{n}^{\prime}>\mathrm{n}$，并使用表实现。然后，$\mathrm{g}$

\begin{aligned} \mathrm{g}= & 2^{\mathrm{n}}\left(\left(. .\left(\left(\mathrm{F}\left(\mathrm{x}{0,0}, \ldots, \mathrm{x}{\mathrm{r}-1,0}\right)^* 2^{-1}+\mathrm{F}\left(\mathrm{x}{0,1}, \ldots, \mathrm{x}{\mathrm{r}-1,1}\right)^* 2^{-1}+\ldots\right)^* 2^{-1}\right.\right.\right. \ & \left.+\mathrm{F}\left(\mathrm{x}{0, \mathrm{n}-1}, \ldots, \mathrm{x}{\mathrm{r}-1, \mathrm{n}-1}\right)\right) \end{aligned}

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## MATLAB代写

MATLAB 是一种用于技术计算的高性能语言。它将计算、可视化和编程集成在一个易于使用的环境中，其中问题和解决方案以熟悉的数学符号表示。典型用途包括：数学和计算算法开发建模、仿真和原型制作数据分析、探索和可视化科学和工程图形应用程序开发，包括图形用户界面构建MATLAB 是一个交互式系统，其基本数据元素是一个不需要维度的数组。这使您可以解决许多技术计算问题，尤其是那些具有矩阵和向量公式的问题，而只需用 C 或 Fortran 等标量非交互式语言编写程序所需的时间的一小部分。MATLAB 名称代表矩阵实验室。MATLAB 最初的编写目的是提供对由 LINPACK 和 EISPACK 项目开发的矩阵软件的轻松访问，这两个项目共同代表了矩阵计算软件的最新技术。MATLAB 经过多年的发展，得到了许多用户的投入。在大学环境中，它是数学、工程和科学入门和高级课程的标准教学工具。在工业领域，MATLAB 是高效研究、开发和分析的首选工具。MATLAB 具有一系列称为工具箱的特定于应用程序的解决方案。对于大多数 MATLAB 用户来说非常重要，工具箱允许您学习应用专业技术。工具箱是 MATLAB 函数（M 文件）的综合集合，可扩展 MATLAB 环境以解决特定类别的问题。可用工具箱的领域包括信号处理、控制系统、神经网络、模糊逻辑、小波、仿真等。